View SE5230_761895.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

NE5230, SA5230, SE5230 Low Voltage Operational Amplifier
The NE5230 is a very low voltage operational amplifier that can perform with a voltage supply as low as 1.8 V or as high as 15 V. In addition, split or single supplies can be used, and the output will swing to ground when applying the latter. There is a bias adjusting pin which controls the supply current required by the device and thereby controls its power consumption. If the part is operated at 0.9 V supply voltages, the current required is only 110 mA when the current control pin is left open. Even with this low power consumption, the device obtains a typical unity gain bandwidth of 250 kHz. When the bias adjusting pin is connected to the negative supply, the unity gain bandwidth is typically 600 kHz while the supply current is increased to 600 mA. In this mode, the part will supply full power output beyond the audio range. The NE5230 also has a unique input stage that allows the common-mode input range to go above the positive and below the negative supply voltages by 250 mV. This provides for the largest possible input voltages for low voltage applications. The part is also internally-compensated to reduce external component count. The NE5230 has a low input bias current of typically 40 nA, and a large open-loop gain of 125 dB. These two specifications are beneficial when using the device in transducer applications. The large open-loop gain gives very accurate signal processing because of the large "excess" loop gain in a closed-loop system. The output stage is a class AB type that can swing to within 100 mV of the supply voltages for the largest dynamic range that is needed in many applications. The NE5230 is ideal for portable audio equipment and remote transducers because of its low power consumption, unity gain bandwidth, and 30 nV/Hz noise specification.
Features http://onsemi.com
8 1 SOIC-8 D SUFFIX CASE 751 8 1 PDIP-8 N SUFFIX CASE 626
PIN CONNECTIONS
N, D Packages NC -IN +IN VEE
1 2 3 4 - + 8 7 6 5
NC VCC OUTPUT BIAS ADJ.
(Top View)
DEVICE MARKING INFORMATION
See general marking information in the device marking section on page 16 of this data sheet.
* * * * * * * * * * * *
Works Down to 1.8 V Supply Voltages Adjustable Supply Current Low Noise Common-mode Includes Both Rails VOUT Within 100 mV of Both Rails Pb-Free Packages are Available
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 16 of this data sheet.
Applications
Portable Precision Instruments Remote Transducer Amplifier Portable Audio Equipment Rail-to-Rail Comparators Half-wave Rectification without Diodes Remote Temperature Transducer with 4.0 to 20 mA Output Transmission
(c) Semiconductor Components Industries, LLC, 2006
March, 2006 - Rev. 4
1
Publication Order Number: NE5230/D
NE5230, SA5230, SE5230
MAXIMUM RATINGS
Rating Single Supply Voltage Dual Supply Voltage Input Voltage (Note 1) Differential Input Voltage (Note 1) Common-Mode Voltage (Positive) Common-Mode Voltage (Negative) Power Dissipation (Note 2) Thermal Resistance, Junction-to-Ambient N Package D Package VCM VCM PD RqJA Symbol VCC VS VIN Value 18 9 9 (18) VS VCC + 0.5 VEE - 0.5 500 130 182 150 0 to 70 -40 to 85 -40 to 125 Indefinite Tstg Tsld -65 to 150 230 Unit V V V V V V mW C/W
Operating Junction Temperature (Note 2) Operating Temperature Range NE SA SE
TJ TA
C C
80 Output Short-Circuit Duration to Either Power Supply Pin (Notes 2 and 3) Storage Temperature Lead Soldering Temperature (10 sec max)
s C C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Can exceed the supply voltages when VS 7.5 V (15 V). 2. The maximum operating junction temperature is 150C. At elevated temperatures, devices must be derated according to the package thermal resistance and device mounting conditions. Derate above 25C at the following rates: N package at 7.7 mW/C D package at 5.5 mW/C. 3. Momentary shorts to either supply are permitted in accordance to transient thermal impedance limitations determined by the package and device mounting conditions.
RECOMMENDED OPERATING CONDITIONS
Characteristic Single Supply Voltage Dual Supply Voltage Common-Mode Voltage (Positive) Common-Mode Voltage (Negative) Temperature NE Grade SA Grade SE Grade Value 1.8 to 15 0.9 to 7.5 VCC + 0.25 VEE - 0.25 0 to +70 -40 to +85 -40 to +125 Unit V V V V C
http://onsemi.com
2
NE5230, SA5230, SE5230
DC AND AC ELECTRICAL CHARACTERISTIC Unless otherwise specified, 0.9V Vs 7.5 V or equivalent single supply,
RL = 10 kW, full input common-mode range, over full operating temperature range. Characteristic NE5230, SA5230 Offset Voltage Drift Offset Current VOS VOS IOS TA = 25C TA = Tlow to Thigh Drift Bias Current IOS IB TA = 25C TA = Tlow to Thigh Any Any Any High Low High Low High Low TA = 25C TA = Tlow to Thigh Drift Supply Current IB IS VS = 0.9 V TA = Tlow to Thigh TA = 25C VS = 7.5 V TA = Tlow to Thigh Common-Mode Input Range Common-Mode Rejection Ratio VCM CMRR VS = 7.5 V Power Supply Rejection Ratio PSRR VOS 6 mV, TA = 25C VOS 6 mV, TA = Tlow to Thigh RS = 10 kW; VCM = 7.5 V; TA = 25C RS = 10 kW; VCM = 7.5 V; TA = Tlow to Thigh TA = 25C VOS v 6 mV, TA = Tlow to Thigh Load Current Source Sink Source Sink Source Sink Source Sink IL VS = 0.9 V; TA = 25C VS = 0.9 V; TA = 25C VS = 7.5 V; TA = 25C VS = 7.5 V; TA = 25C VS = 0.9 V; TA = Tlow to Thigh VS = 0.9 V; TA = Tlow to Thigh VS = 7.5 V; TA = Tlow to Thigh VS = 7.5 V; TA = Tlow to Thigh High Low High Low High Low TA = 25C Low High Low High Low High Low High Any Any Any Any High Low High Low High High High High Any Any Any Any 1.0 2.0 4.0 5.0 V- - 0.25 V- 85 80 90 85 75 80 4.0 5.0 6 7 16 32 5 6 10 15 mA 105 95 dB 95 V+ 320 1100 2.0 2.0 110 600 0.5 0.3 40 20 0.4 3.0 2.0 3.0 3.0 3.0 4.0 5.0 50 30 100 60 1.4 1.4 150 60 200 150 4.0 4.0 160 750 250 800 550 1600 600 1700 + 0.25 V+ dB V mA mA nA/C nA nA/C mV/C nA mV Symbol Test Conditions Bias Min Typ Max Unit
For NE5230 devices, Tlow = 0C and Thigh = +70C. For SA5230 devices, Tlow = -40C and Thigh = +85C.
http://onsemi.com
3
NE5230, SA5230, SE5230
DC AND AC ELECTRICAL CHARACTERISTIC Unless otherwise specified, 0.9V Vs 7.5 V or equivalent single supply,
RL = 10 kW, full input common-mode range, over full operating temperature range. Characteristic SE5230 Offset Voltage VOS VOS IOS TA = 25C TA = Tlow to Thigh Drift Bias Current IOS IB TA = 25C TA = Tlow to Thigh Drift Offset Current Any Any Any High Low High Low High Low TA = 25C TA = Tlow to Thigh Drift Supply Current IB IS VS = 0.9 V TA = Tlow to Thigh TA = 25C VS = 7.5 V TA = Tlow to Thigh Common-Mode Input Range Common-Mode Rejection Ratio VCM CMRR VS = 7.5 V Power Supply Rejection Ratio PSRR VOS 6 mV, TA = 25C VOS 20 mV, TA = Tlow to Thigh RS = 10 kW; VCM = 7.5 V; TA = 25C RS = 10 kW; VCM = 7.5 V; TA = Tlow to Thigh TA = 25C TA = Tlow to Thigh Load Current Source Sink Source Sink Source Sink Source Sink IL VS = 0.9 V; TA = 25C VS = 0.9 V; TA = 25C VS = 7.5 V; TA = 25C VS = 7.5 V; TA = 25C VS = 0.9 V; TA = Tlow to Thigh VS = 0.9 V; TA = Tlow to Thigh VS = 7.5 V; TA = Tlow to Thigh VS = 7.5 V; TA = Tlow to Thigh High Low High Low High Low TA = 25C Low High Low High Low High Low High Any Any Any Any High Low High Low High High High High Any Any Any Any 1.0 2.0 4.0 5.0 V- - 0.25 V- 85 80 90 85 75 80 4.0 5.0 6 7 16 32 5 6 10 15 mA 105 95 dB 95 320 1100 2.0 2.0 110 600 0.5 0.3 40 20 0.4 3.0 2.0 3.0 3.0 3.0 4.0 5.0 50 30 100 60 1.4 1.4 150 60 300 300 4.0 4.0 160 750 275 850 550 1600 600 1700 V+ + 0.25 V+ dB V mA mA nA/C nA nA/C mV/C nA mV Symbol Test Conditions Bias Min Typ Max Unit
For SE5230 devices, Tlow = -40C and Thigh = +125C.
http://onsemi.com
4
NE5230, SA5230, SE5230
DC AND AC ELECTRICAL CHARACTERISTIC Unless otherwise specified, 0.9V Vs 7.5 V or equivalent single supply,
RL = 10 kW, full input common-mode range, over full operating temperature range. Characteristic NE5230, SA5230, SE5230 Large-Signal Open-Loop Gain AVOL VS = 7.5 V RL = 10 kW; TA = 25C TA = Tlow to Thigh Output Voltage Swing VOUT VS = 0.9 V TA = 25C +SW TA = 25C -SW TA = Tlow to Thigh; +SW TA = Tlow to Thigh; -SW TA = 25C +SW VS = 7.5 V TA = 25C -SW TA = Tlow to Thigh; +SW TA = Tlow to Thigh; -SW Slew Rate Inverting Unity Gain Bandwidth Phase Margin Settling Time Input Noise Total Harmonic Distortion SR BW qM tS VINN THD TA = 25C CL = 100 pF; TA = 25C CL = 100 pF; TA = 25C CL = 100 pF, 0.1% RS = 0 W; f = 1.0 kHz VS = 7.5 V AV = 1; VIN = 500 mV; f = 1.0 kHz VS = 0.9 V AV = 1, VIN = 500 mV; f = 1.0 kHz High Low High Low Any Any Any Any Any Any Any Any High Low High Low Any High Low High Low High High 120 60 100 50 750 750 700 700 7.30 -7.32 7.25 -7.30 7.35 -7.35 7.30 -7.35 0.25 0.09 0.6 0.25 70 2.0 5.0 30 60 0.003 0.002 V/ms V/ms MHz MHz ms ms nV/Hz nV/Hz % % V 800 800 mV 2000 750 V/mV Symbol Test Conditions Bias Min Typ Max Unit
For NE5230 devices, Tlow = 0C and Thigh = +70C. For SA5230 devices, Tlow = -40C and Thigh = +85C. For SE5230 devices, Tlow = -40C and Thigh = +125C.
http://onsemi.com
5
NE5230, SA5230, SE5230
THEORY OF OPERATION voltage moves from the range where only the NPN pair was Operational amplifiers which are able to function at operating to where both of the input pairs were operating, the minimum supply voltages should have input and output effective transconductance would change by a factor of two. stage swings capable of reaching both supply voltages Frequency compensation for the ranges where one input pair within a few millivolts in order to achieve ease of quiescent was operating would, of course, not be optimal for the range biasing and to have maximum input/output signal handling where both pairs were operating. Secondly, fast changes in capability. The input stage of the NE5230 has a the common-mode voltage would abruptly saturate and common-mode voltage range that not only includes the restore the emitter current sources, causing transient entire supply voltage range, but also allows either supply to distortion. These problems were overcome by assuring that be exceeded by 250 mV without increasing the input offset only the input transistor pair which is able to function voltage by more than 6.0 mV. This is unequalled by any properly is active. The NPN pair is normally activated by the other operational amplifier today. current source IB1 through Q5 and the current mirror Q6 and In order to accomplish the feat of rail-to-rail input Q7, assuming the PNP pair is non-conducting. When the common-mode range, two emitter-coupled differential common-mode input voltage passes below the reference pairs are placed in parallel so that the common-mode voltage, VB1 - 0.8 V at the base of Q5, the emitter current is voltage of one can reach the positive supply rail and the other gradually steered toward the PNP pair, away from the NPN can reach the negative supply rail. The simplified schematic pair. The transfer of the emitter currents between the of Figure 1 shows how the complementary emitter-coupler complementary input pairs occurs in a voltage range of transistors are configured to form the basic input stage cell. about 120 mV around the reference voltage VB1. In this way Common-mode input signal voltages in the range from the sum of the emitter currents for each of the NPN and PNP 0.8 V above VEE to VCC are handled completely by the NPN transistor pairs is kept constant; this ensures that the pair, Q3 and Q4, while common-mode input signal voltages transconductance of the parallel combination will be in the range of VEE to 0.8 V above VEE are processed only constant, since the transconductance of bipolar transistors is by the PNP pair, Q1 and Q2. The intermediate range of input proportional to their emitter currents. voltages requires that both the NPN and PNP pairs are An essential requirement of this kind of input stage is to operating. The collector currents of the input transistors are minimize the changes in input offset voltage between that of summed by the current combiner circuit composed of the NPN and PNP transistor pair which occurs when the transistors Q8 through Q11 into one output current. input common-mode voltage crosses the internal reference Transistor Q8 is connected as a diode to ensure that the voltage, VB1. Careful circuit layout with a cross-coupled outputs of Q2 and Q4 are properly subtracted from those of quad for each input pair has yielded a typical input offset Q1 and Q3. voltage of less than 0.3 mV and a change in the input offset The input stage was designed to overcome two important voltage of less than 0.1 mV. problems for rail-to-rail capability. As the common-mode
Input Stage
VCC R10 R11 + V Vb2
Ib1 Q3 Q4
Q10
Q11
VIN-
Q1
Q2
VIN+
IOUT
Q5
Q8
Q9
+ V Vb1
Q6
Q7
R8
R9 VEE
Figure 1. Input Stage http://onsemi.com
6
NE5230, SA5230, SE5230
Output Stage
Processing output voltage swings that nominally reach to less than 100 mV of either supply voltage can only be achieved by a pair of complementary common-emitter connected transistors. Normally, such a configuration causes complex feed-forward signal paths that develop by combining biasing and driving which can be found in previous low supply voltage designs. The unique output stage of the NE5230 separates the functions of driving and biasing, as shown in the simplified schematic of Figure 2 and has the advantage of a shorter signal path which leads to increasing the effective bandwidth. This output stage consists of two parts: the Darlington output transistors and the class AB control regulator. The output transistor Q3 connected with the Darlington transistors Q4 and Q5 can source up to 10 mA to an output load. The output of NPN Darlington connected transistors Q1 and Q2 together are able to sink an output current of 10 mA. Accurate and efficient class AB control is necessary to insure that none of the output transistors are ever completely cut off. This is accomplished by the differential amplifier (formed by Q8 and Q9) which controls the biasing of the output transistors. The differential amplifier compares the summed voltages across two diodes, D1 and D2, at the base of Q8 with the summed voltages across the base-emitter diodes of the output transistors Q1 and Q3. The base-emitter voltage of Q3 is converted into a current by Q6 and R6 and reconverted into a voltage across the base-emitter diode of Q7 and R7. The summed voltage across the base-emitter diodes of the output transistors Q3 and Q1 is proportional to the logarithm of the product of the push and pull currents IOP and ION, respectively. The
combined voltages across diodes D1 and D2 are proportional to the logarithm of the square of the reference current IB1. When the diode characteristics and temperatures of the pairs Q1, D1 and Q3, Q2 are equal, the relation IOP x ION - IB1 x IB1 is satisfied. Separating the functions of biasing and driving prevents the driving signals from becoming delayed by the biasing circuit. The output Darlington transistors are directly accessible for in-phase driving signals on the bases of Q5 and Q2. This is very important for simple high-frequency compensation. The output transistors can be high-frequency compensated by Miller capacitors CM1A and CM1B connected from the collectors to the bases of the output Darlington transistors. A general-purpose op amp of this type must have enough open-loop gain for applications when the output is driving a low resistance load. The NE5230 accomplishes this by inserting an intermediate common-emitter stage between the input and output stages. The three stages provide a very large gain, but the op amp now has three natural dominant poles - one at the output of each common-emitter stage. Frequency compensation is implemented with a simple scheme of nested, pole-splitting Miller integrators. The Miller capacitors CM1A and CM1B are the first part of the nested structure, and provide compensation for the output and intermediate stages. A second pair of Miller integrators provide pole-splitting compensation for the pole from the input stage and the pole resulting from the compensated combination of poles from the intermediate and output stages. The result is a stable, internally-compensated op amp with a phase margin of 70.
VCC R6
Ib1
Ib2
Ib3 Q6 Q3 Q5 CM1B Q4 VOUT CM1A IOP
Vb5
Vb2 Q8 D1 Ib4 D2 Q7 Ib5 Q9 R7
Q2
ION
Q1
VEE
Figure 2. Output Stage http://onsemi.com
7
NE5230, SA5230, SE5230
THERMAL CONSIDERATIONS When using the NE5230, the internal power dissipation capabilities of each package should be considered. ON Semiconductor does not recommend operation at die temperatures above 110C in the SO package because of its inherently smaller package mass. Die temperatures of 150C can be tolerated in all the other packages. With this in mind, the following equation can be used to estimate the die temperature:
Tj + Tamb ) (PD qJA)
(eq. 1)
Where Tamb = Ambient Temperature Tj = Die Temperature PD = Power Dissipation = (ICC x VCC) qJA = Package Thermal Resistance = 270C/W for SO-8 in PC Board Mounting See the packaging section for information regarding other methods of mounting. qJA - 100C/W for the plastic DIP. The maximum supply voltage for the part is 15 V and the typical supply current is 1.1 mA (1.6 mA max). For operation at supply voltages other than the maximum, see the data sheet for ICC versus VCC curves. The supply current is somewhat proportional to temperature and varies no more than 100 mA between 25C and either temperature extreme. Operation at higher junction temperatures than that recommended is possible but will result in lower Mean Time Between Failures (MTBF). This should be considered before operating beyond recommended die temperature because of the overall reliability degradation. DESIGN TECHNIQUES AND APPLICATIONS The NE5230 is a very user-friendly amplifier for an engineer to design into any type of system. The supply current adjust pin (Pin 5) can be left open or tied through a pot or fixed resistor to the most negative supply (i.e., ground for single supply or to the negative supply for split supplies). The minimum supply current is achieved by leaving this pin open. In this state it will also decrease the bandwidth and slew rate. When tied directly to the most negative supply, the device has full bandwidth, slew rate and ICC. The programming of the current-control pin depends on the trade-offs which can be made in the designer's application. The graphs in Figures 3 and 4 will help by showing bandwidth versus ICC. As can be seen, the supply current can be varied anywhere over the range of 100 mA to 600 mA for a supply voltage of 1.8 V. An external resistor can be inserted between the current control pin and the most
negative supply. The resistor can be selected between 1.0 W to 100 kW to provide any required supply current over the indicated range. In addition, a small varying voltage on the bias current control pin could be used for such exotic things as changing the gain-bandwidth for voltage controlled low pass filters or amplitude modulation. Furthermore, control over the slew rate and the rise time of the amplifier can be obtained in the same manner. This control over the slew rate also changes the settling time and overshoot in pulse response applications. The settling time to 0.1% changes from 5.0 ms at low bias to 2.0 ms at high bias. The supply current control can also be utilized for wave-shaping applications such as for pulse or triangular waveforms. The gain-bandwidth can be varied from between 250 kHz at low bias to 600 kHz at high bias current. The slew rate range is 0.08 V/ms at low bias and 0.25 V/ms at high bias.
POWER SUPPLY CURRENT (mA) 800 700 600 500 400 300 200
100 100
200
300
400 500 600700
UNITY GAIN BANDWIDTH (kHz)
Figure 3. Unity Gain Bandwidth vs. Power Supply Current for VCC = 0.9 V
1.4 1.2 ICC CURRENT (mA) 1.0 0.8 0.6 0.4 0.2 0.0 0 10 101 102 RADJ (W) 103 104 105 VCC - 15V VCC - 12V VCC - 9V VCC - 6V VCC - 3V VCC - 2V VCC - 1.8V TA - 25C
Figure 4. ICC Current vs. Bias Current Adjusting Resistor for Several Supply Voltages
http://onsemi.com
8
NE5230, SA5230, SE5230
The full output power bandwidth range for VCC equals 2.0 V, is above 40 kHz for the maximum bias current setting and greater than 10 kHz at the minimum bias current setting. If extremely low signal distortion (<0.05%) is required at low supply voltages, exclude the common-mode crossover point (VB1) from the common-mode signal range. This can be accomplished by proper bias selection or by using an inverting amplifier configuration. Most single supply designs necessitate that the inputs to the op amp be biased between VCC and ground. This is to assure that the input signal swing is within the working common-mode range of the amplifier. This leads to another helpful and unique property of the NE5230 that other CMOS and bipolar low voltage parts cannot achieve. It is the simple fact that the input common-mode voltage can go beyond either the positive or negative supply voltages. This benefit is made very clear in a non-inverting voltage-follower configuration. This is shown in Figure 5 where the input sine wave allows an undistorted output sine wave which will swing less than 100 mV of either supply voltage. Many competitive parts will show severe clipping caused by input common-mode limitations. The NE5230 in this configuration offers more freedom for quiescent biasing of the inputs close to the positive supply rail where similar op amps would not allow signal processing. There are not as many considerations when designing with the NE5230 as with other devices. Since the NE5230 is internally-compensated and has a unity gain-bandwidth of 600 kHz, board layout is not so stringent as for very high frequency devices such as the NE5205. The output capability of the NE5230 allows it to drive relatively high capacitive loads and small resistive loads. The power supply pins should be decoupled with a low-pass RC network as close to the supply pins as possible to eliminate 60 Hz and other external power line noise, although the power supply rejection ratio (PSRR) for the part is very high. The pinout for the NE5230 is the same as the standard single op amp pinout with the exception of the bias current adjusting pin.
V+ V+ +
- V-
V-
V+
NE5230
V- V+ OTHER PARTS
V-
Figure 5. In a non-inverting voltage-follower configuration, the NE5230 will give full rail-to-rail swing. Other low voltage amplifiers will not because they are limited by their input common-mode range and output swing capability.
http://onsemi.com
9
NE5230, SA5230, SE5230
REMOTE TRANSDUCER WITH CURRENT TRANSMISSION There are many ways to transmit information along two wires, but current transmission is the most beneficial when the sensing of remote signals is the aim. It is further enhanced in the form of 4.0 to 20 mA information which is used in many control-type systems. This method of transmission provides immunity from line voltage drops, large load resistance variations, and voltage noise pickup. The zero reference of 4mA not only can show if there is a break in the line when no current is flowing, but also can power the transducer at the remote location. Usually the transducer itself is not equipped to provide for the current transmission. The unique features of the NE5230 can provide high output current capability coupled with low power consumption. It can be remotely connected to the transducer to create a current loop with minimal external components. The circuits for this are shown in Figures 6 and 7. Here, the part is configured as a voltage-to-current, or transconductance amplifier. This is a novel circuit that takes advantage of the NE5230's large open-loop gain. In AC applications, the load current will decrease as the open-loop gain rolls off in magnitude. The low offset voltage and current sinking capabilities of the NE5230 must also be considered in this application. The NE5230 circuit shown in Figure 6 is a pseudo transistor configuration. The inverting input is equivalent to the "base," the point where VEE and the non-inverting input meet is the "emitter," and the connection after the output diode meets the VCC pin is the collector. The output diode is essential to keep the output from saturating in this configuration. From here it can be seen that the base and emitter form a voltage-follower and the voltage present at RC must equal the input voltage present at the inverting input. Also, the emitter and collector form a current-follower and the current flowing through RC is equivalent to the current through RL and the amplifier. This sets up the current loop. Therefore, the following equation can be formulated for the working current transmission line. The load current is:
V IL + IN RC
(eq. 2)
Where VCC min is the worst-case power supply voltage (approximately 1.8 V) that will still keep the part operational. As an example, when using a 15 V remote power supply, a current sensing resistor of 1.0 W, and an input voltage (VIN) of 20 mV, the output current (IL) is 20 mA. Furthermore, a load resistance of zero to approximately 650 W can be inserted in the loop without any change in current when the bias current-control pin is tied to the negative supply pin. The voltage drop across the load and line resistance will not affect the NE5230 because it will operate down to 1.8 V. With a 15 V remote supply, the voltage available at the amplifier is still enough to power it with the maximum 20 mA output into the 650 W load.
3 7 VCC 6 5 VEE RL VIN IOUT V +REMOTE POWER - SUPPLY
+
NE5230 2
T R A N S D U C E R
-4
RC
NOTES: 1. IOUT = VIN/RC * 1.8V * V INMAX V 2. RL MAX REMOTE I OUT
For RC = 1.0 W I OUT V IN 4mA 4mV 20mA 20mV
Figure 6. The NE5230 as a Remote Transducer Transconductance Amp with 4.0 - 20 mA Current Transmission Output Capability
+ VIN - 3 + 7 RC VCC 6 5 VEE + IOUT RL + -
and proportional to the input voltage for a set RC. Also, the current is constant no matter what load resistance is used while within the operating bandwidth range of the op amp. When the NE5230's supply voltage falls past a certain point, the current cannot remain constant. This is the "voltage compliance" and is very good for this application because of the near rail output voltage. The equation that determines the voltage compliance as well as the largest possible load resistor for the NE5230 is as follows:
RLmax + [Vremote supply * VCC min * VIN max] IL
VCC
NE5230 2 -4
Figure 7. The Same Type of Circuit as Figure 6, but for Sourcing Current to the Load
(eq. 3)
http://onsemi.com
10
NE5230, SA5230, SE5230
What this means is that several instruments, such as a chart recorder, a meter, or a controller, as well as a long cable, can be connected in series on the loop and still obtain accurate readings if the total resistance does not exceed 650 W. Furthermore, any variation of resistance in this range will not change the output current. Any voltage output type transducer can be used, but one that does not need external DC voltage or current excitation to limit the maximum possible load resistance is preferable. Even this problem can be surmounted if the supply power needed by the transducer is compatible with the NE5230. The power goes up the line to the transducer and amplifier while the transducer signal is sent back via the current output of the NE5230 transconductance configuration. The voltage range on the input can be changed for transducers that produce a large output by simply increasing the current sense resistor to get the corresponding 4.0 to 20 mA output current. If a very long line is used which causes high line resistance, a current repeater could be inserted into the line. The same configuration of Figure 7 can be used with exception of a resistor across the input and line ground to convert the current back to voltage. Again, the current sensing resistor will set up the transconductance and the part will receive power from the line. TEMPERATURE TRANSDUCER A variation on the previous circuit makes use of the supply current control pin. The voltage present at this pin is proportional to absolute temperature (PTAT) because it is produced by the amplifier bias current through an internal resistor divider in a PTAT cell. If the control pin is connected to the input pin, the NE5230 itself can be used as a temperature transducer. If the center tap of a resistive pot is connected to the control pin with one side to ground and the other to the inverting input, the voltage can be changed to give different temperature versus output current conditions (Figure 8). For additional control, the output current is still proportional to the input voltage differential divided by the current sense resistor. When using the NE5230 as a temperature transducer, the thermal considerations in the previous section must be kept in mind.
3
+
7
VCC 6 5
IOUT V
NE5230 2 - V 4 EE 10W
+REMOTE POWER - SUPPLY
RL
200 RC
NOTES: 1. IOUT = VIN/RC * 1.8V * V INMAX V 2. RL MAX REMOTE I OUT
For RC = 1W I OUT V IN 4mA 4mV 20mA 20mV
Figure 8. NE5230 remote temperature transducer utilizing 4.0 - 20 mA current transmission. This application shows the use of the accessibility of the PTAT cell in the device to make the part, itself, a transducer.
http://onsemi.com
11
NE5230, SA5230, SE5230
HALF-WAVE RECTIFIER WITH RAIL-TO-GROUND OUTPUT SWING Since the NE5230 input common-mode range includes both positive and negative supply rails and the output can also swing to either supply, achieving half-wave rectifier functions in either direction becomes a simple task. All that is needed are two external resistors; there is no need for diodes or matched resistors. Moreover, it can have either positive- or negative-going outputs, depending on the way the bias is arranged. In Figure 9, the circuit is biased to ground, while circuit (Figure 10) is biased to the positive supply. This rather unusual biasing does not cause any problems with the NE5230 because of the unique internal saturation detectors incorporated into the part to keep the PNP and NPN output transistors out of "hard" saturation. It is therefore relatively quick to recover from a saturated output condition. Furthermore, the device does not have parasitic current draw when the output is biased to either rail. This makes it possible to bias the NE5230 into "saturation" and obtain half-wave rectification with good recovery. The simplicity of biasing and the rail-to-ground half-sine wave swing are unique to this device. The circuit gain can be changed by the standard op amp gain equations for an inverting configuration. It can be seen in these configurations that the op amp cannot respond to one-half of the incoming waveform. It cannot respond because the waveform forces the amplifier to swing the output beyond either ground or the positive supply rail, depending on the biasing, and, also, the output cannot disengage during this half cycle. During the other half cycle, however, the amplifier achieves a half-wave that can have a peak equal to the total supply voltage. The photographs in Figure 11 show the effect of the different biasing schemes, as well as the wide bandwidth (it works over the full audio range), that the NE5230 can achieve in this configuration.
Half-Wave Rectifier With Positive-Going Output Swings
10W 10W VCC 2 - 7 6 3 O + 4 5 VCC VOUT
VIN
t
Figure 9. Rail-to-Ground Output Swing Referenced to Ground
VCC 3 + 7 6 4 10W t 5 VCC VOUT
10W VIN VCC
2
-
Figure 10. Negative-Going Output Referenced to VCC
http://onsemi.com
12
NE5230, SA5230, SE5230
500 mV/Div 200mS /Div Biased to Ground
500 mV/Div 20 mS/Div Biased to Ground
500 mV/Div 20 mS/Div Biased to Positive Rail
Figure 11. Performance Waveforms for the Circuits in Figures 9 and 10. Good response is shown at 1.0 and 10 kHz for both circuits under full swing with a 2.0 V supply.
http://onsemi.com
13
NE5230, SA5230, SE5230
By adding another NE5230 in an inverting summer configuration at the output of the half-wave rectifier, a full-wave can be realized. The values for the input and feedback resistors must be chosen so that each peak will have equal amplitudes. A table for calculating values is included in Figure 12. The summing network combines the input signal at the half-wave and adds it to double the half-wave's output, resulting in the full-wave. The output waveform can be referenced to the supply or ground, depending on the half-wave configuration. Again, no diodes are needed to achieve the rectification. This circuit could be used in conjunction with the remote transducer to convert a received AC output signal into a DC level at the full-wave output for meters or chart recorders that need DC levels.
500mV
500mV
520ms
INPUT
HALF-WAVE OUTPUT
+VIN
a b
FULL-WAVE OUTPUT
500mV
-VIN
R3
R5
3 +VIN
+ A1
7 6 4 R2 5 VEE 3 R4 2 -
VCC 7 A2 + 4 6 5 +VIN +VB a b
a b
R1
2-
FULL-WAVE
-VIN
NOTES: R2 = 2 R1 R4 = R5 = R3 +VB will vary output reference. For single supply operation VEE can be grounded on A2.
+VB 0 2a -2VIN HALF-WAVE
VEE
Figure 12. Adding an Inverting Summer to the Input and Output of the Half-Wave will Result in Full-Wave
http://onsemi.com
14
NE5230, SA5230, SE5230
CONCLUSION The NE5230 is a versatile op amp in its own right. The part was designed to give low voltage and low power operation without the limitations of previously available amplifiers that had a multitude of problems. The previous application examples are unique to this amplifier and save the user money by excluding various passive components that would have been needed if not for the NE5230's special input and output stages. The NE5230 has a combination of novel specifications which allows the designer to implement it easily into existing low-supply voltage designs and to enhance their performance. It also offers the engineer the freedom to achieve greater amplifier system design goals. The low input referenced noise voltage eases the restrictions on designs where S/N ratios are important. The wide full-power bandwidth and output load handling capability allow it to fit into portable audio applications. The truly ample open-loop gain and low power consumption easily lend themselves to the requirements of remote transducer applications. The low, untrimmed typical offset voltage and low offset currents help to reduce errors in signal processing designs. The amplifier is well isolated from changes on the supply lines by its typical power supply rejection ratio of 105 dB. REFERENCES 1. Johan H. Huijsing, Multi-stage Amplifier with Capacitive Nesting for Frequency Compensation, U.S. Patent Application Serial No. 602.234, filed April 19, 1984. 2. Bob Blauschild, Differential Amplifier with Rail-to-Rail Capability, U.S. Patent Application Serial No. 525.181, filed August 23, 1983. 3. Operational Amplifiers - Characteristics and Applications, Robert G. Irvine, Prentice-Hall, Inc., Englewood Cliffs, NJ 07632, 1981. 4. Transducer Interface Handbook - A Guide to Analog Signal Conditioning, Edited by Daniel H. Sheingold, Analog Devices, Inc., Norwood, MA 02062, 1981.
http://onsemi.com
15
NE5230, SA5230, SE5230
MARKING DIAGRAMS
8 N5230 ALYW G 8 S5230 ALYW G 8 S5230 ALYWE G NE5230N AWL YYWWG SA5230N AWL YYWWG
1
1
1
SOIC-8 D SUFFIX CASE 751 A WL, L YY, Y WW, W G or G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
PDIP-8 N SUFFIX CASE 626
ORDERING INFORMATION
Device NE5230D NE5230DG NE5230DR2 NE5230DR2G NE5230N NE5230NG SA5230D SA5230DG SA5230DR2 SA5230DR2G SA5230N SA5230NG SE5230D SE5230DR2 Description 8-Pin Plastic Small Outline (SO-8) Package 8-Pin Plastic Small Outline (SO-8) Package (Pb-Free) 8-Pin Plastic Small Outline (SO-8) Package 8-Pin Plastic Small Outline (SO-8) Package (Pb-Free) 8-Pin Plastic Dual In-Line Package (PDIP-8) 8-Pin Plastic Dual In-Line Package (PDIP-8) (Pb-Free) 8-Pin Plastic Small Outline (SO-8) Package 8-Pin Plastic Small Outline (SO-8) Package (Pb-Free) 8-Pin Plastic Small Outline (SO-8) Package 8-Pin Plastic Small Outline (SO-8) Package (Pb-Free) 8-Pin Plastic Dual In-Line Package (PDIP-8) 8-Pin Plastic Dual In-Line Package (PDIP-8) (Pb-Free) 8-Pin Plastic Small Outline (SO-8) Package 8-Pin Plastic Small Outline (SO-8) Package Temperature Range 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +125C -40C to +125C Shipping 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 50 Units / Rail 50 Units / Rail 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 50 Units / Rail 50 Units / Rail 98 Units / Rail 2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
http://onsemi.com
16
NE5230, SA5230, SE5230
PACKAGE DIMENSIONS
PDIP-8 CASE 626-05 ISSUE L
NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --- 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --- 10_ 0.030 0.040
8
5
-B-
1 4
F
NOTE 2
-A-
L
C -T-
SEATING PLANE
J N D K
M
M TA
M
H
G 0.13 (0.005) B
M
http://onsemi.com
17
NE5230, SA5230, SE5230
PACKAGE DIMENSIONS
SOIC-8 NB CASE 751-07 ISSUE AG
-X- A
8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
B
1
S
4
0.25 (0.010)
M
Y
M
-Y- G
K
C -Z- H D 0.25 (0.010)
M SEATING PLANE
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
http://onsemi.com
18
NE5230/D

▲Up To Search▲

Price & Availability of SE5230

	To Download SE5230 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .